// File: STM32F401xBCDE_411xCE.dbgconf // Version: 1.0.0 // Note: refer to STM32F401xB/C STM32F401xD/E reference manual (RM0368) // refer to STM32F401xB/C STM32F401xD/E datasheet // refer to STM32F411xC/E reference manual (RM0383) // refer to STM32F411xC/E datasheet // <<< Use Configuration Wizard in Context Menu >>> // Debug MCU configuration register (DBGMCU_CR) // DBG_STANDBY Debug Standby Mode // DBG_STOP Debug Stop Mode // DBG_SLEEP Debug Sleep Mode // DbgMCU_CR = 0x00000007; // Debug MCU APB1 freeze register (DBGMCU_APB1_FZ) // Reserved bits must be kept at reset value // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS timeout mode stopped when core is halted // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS timeout mode stopped when core is halted // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS timeout mode stopped when core is halted // DBG_IWDG_STOP Independent watchdog stopped when core is halted // DBG_WWDG_STOP Window watchdog stopped when core is halted // DBG_RTC_STOP RTC stopped when core is halted // DBG_TIM5_STOP TIM5 counter stopped when core is halted // DBG_TIM4_STOP TIM4 counter stopped when core is halted // DBG_TIM3_STOP TIM3 counter stopped when core is halted // DBG_TIM2_STOP TIM2 counter stopped when core is halted // DbgMCU_APB1_Fz = 0x00000000; // Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) // Reserved bits must be kept at reset value // DBG_TIM11_STOP TIM11 counter stopped when core is halted // DBG_TIM10_STOP TIM10 counter stopped when core is halted // DBG_TIM9_STOP TIM9 counter stopped when core is halted // DBG_TIM1_STOP TIM1 counter stopped when core is halted // DbgMCU_APB2_Fz = 0x00000000; // <<< end of configuration section >>>