138 lines
4.3 KiB
C
138 lines
4.3 KiB
C
/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_rms_q31.c
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* Description: Root Mean Square of the elements of a Q31 vector
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*
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* $Date: 27. January 2017
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* $Revision: V.1.5.1
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*
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* Target Processor: Cortex-M cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "arm_math.h"
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/**
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* @addtogroup RMS
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* @{
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*/
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/**
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* @brief Root Mean Square of the elements of a Q31 vector.
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* @param[in] *pSrc points to the input vector
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* @param[in] blockSize length of the input vector
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* @param[out] *pResult rms value returned here
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* @return none.
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*
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* @details
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* <b>Scaling and Overflow Behavior:</b>
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*
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*\par
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* The function is implemented using an internal 64-bit accumulator.
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* The input is represented in 1.31 format, and intermediate multiplication
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* yields a 2.62 format.
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* The accumulator maintains full precision of the intermediate multiplication results,
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* but provides only a single guard bit.
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* There is no saturation on intermediate additions.
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* If the accumulator overflows, it wraps around and distorts the result.
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* In order to avoid overflows completely, the input signal must be scaled down by
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* log2(blockSize) bits, as a total of blockSize additions are performed internally.
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* Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
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*
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*/
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void arm_rms_q31(
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q31_t * pSrc,
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uint32_t blockSize,
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q31_t * pResult)
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{
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q63_t sum = 0; /* accumulator */
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q31_t in; /* Temporary variable to store the input */
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uint32_t blkCnt; /* loop counter */
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#if defined (ARM_MATH_DSP)
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/* Run the below code for Cortex-M4 and Cortex-M3 */
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q31_t in1, in2, in3, in4; /* Temporary input variables */
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/*loop Unrolling */
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blkCnt = blockSize >> 2U;
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/* First part of the processing with loop unrolling. Compute 8 outputs at a time.
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** a second loop below computes the remaining 1 to 7 samples. */
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while (blkCnt > 0U)
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{
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/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
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/* Compute sum of the squares and then store the result in a temporary variable, sum */
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/* read two samples from source buffer */
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in1 = pSrc[0];
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in2 = pSrc[1];
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/* calculate power and accumulate to accumulator */
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sum += (q63_t) in1 *in1;
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sum += (q63_t) in2 *in2;
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/* read two samples from source buffer */
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in3 = pSrc[2];
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in4 = pSrc[3];
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/* calculate power and accumulate to accumulator */
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sum += (q63_t) in3 *in3;
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sum += (q63_t) in4 *in4;
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/* update source buffer to process next samples */
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pSrc += 4U;
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/* Decrement the loop counter */
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blkCnt--;
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}
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/* If the blockSize is not a multiple of 8, compute any remaining output samples here.
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** No loop unrolling is used. */
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blkCnt = blockSize % 0x4U;
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#else
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/* Run the below code for Cortex-M0 */
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blkCnt = blockSize;
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#endif /* #if defined (ARM_MATH_DSP) */
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while (blkCnt > 0U)
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{
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/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
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/* Compute sum of the squares and then store the results in a temporary variable, sum */
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in = *pSrc++;
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sum += (q63_t) in *in;
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/* Decrement the loop counter */
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blkCnt--;
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}
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/* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
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/* Compute Rms and store the result in the destination vector */
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arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
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}
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/**
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* @} end of RMS group
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*/
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